Unganged dual что значит

Влияние режимов контроллера памяти на быстродействие AMD Phenom X4 в реальных приложениях

В данном материале мы продолжим серию исследований различных особенностей функционирования систем на базе процессоров серии AMD Phenom, посвящённую изучению влияния опций и компонентов данных систем на их быстродействие в реальном ПО. Сегодня «героем дня» станет опция BIOS системных плат под Socket AM2+, управляющая режимом работы встроенного контроллера памяти AMD Phenom, и переключающая его в один из режимов: «Ganged» («спаренный») и «Unganged».

Официальное мнение состоит в том, что классический «спаренный» (ganged) режим обеспечивает максимальную производительность доступа к памяти при работе однопоточных приложений, в то время как unganged режим, по идее, должен обеспечивать более высокую скорость для многопоточных задач. С результатами синтетических тестов в обоих режимах можно ознакомиться, к примеру, вот в этом материале, однако сегодня нас будет интересовать не синтетика, а исключительно реальное, «рабочее» ПО.

Используемый тестовый стенд полностью аналогичен по составу тому, на котором мы уже тестировали Phenom X4 9850, за тем исключением, что в данном случае использовалась обычная DDR2-800 с таймингами 4-4-4-10-22-2T. Впрочем, учитывая то, что Phenom X4 9850 оказался вообще не очень чувствительным к скорости памяти, мы не считаем, что это могло иметь какое-то существенное значение (тем более что Ganged-режим также был перетестирован с DDR2-800). Тестовая методика — стандартная, последней версии.

Пакеты трёхмерного моделирования

Легко заметить, что более-менее существенная разница между двумя режимами наблюдается только в интерактивной части теста SPEC для 3ds max, и в этом случае режим Ganged показывает более высокий результат. В целом же по группе мы имеем мизерные 0,4%, о которых даже говорить не стоит, чьё бы преимущество они не олицетворяли.

CAD/CAM пакеты

Здесь наблюдается стабильная тенденция — режим Unganged не выиграл ни одного подтеста в группе. Но проигрыши опять мизерные: самый большой равняется 1,1%. Снова не о чем говорить.

Компиляция

Режим Ganged позволяет сэкономить 12 секунд на отрезке в полчаса.

Профессиональная работа с фотографиями

Здесь наоборот режим Ganged либо играет вничью, либо проигрывает, но значения проигрыша такие же несущественные, как и во всех предыдущих тестах.

Научно-математические пакеты

MATLAB в одном из подтестов приблизился к «рекорду» 3ds max, но в целом картина такая же индифферентная, как и во всех предыдущих тестах.

Веб-сервер

Наконец-то мы видим более-менее существенные значения — аж до 5%! При этом, что характерно, они говорят отнюдь не в пользу Unganged-режима.

Архиваторы

Разницы, можно считать, нет.

Кодирование медиаданных

Ну а в данном случае её просто нет, безо всяких «можно считать».

Игры однозначно голосуют в пользу Unganged-режима, причём три из семи — с достаточно весомыми значениями. Call of Duty — «чемпион статьи» — в этом игровом тесте разница между Ganged и Unganged режимами составила рекордные 6,5% (в пользу Unganged).

Любительская работа с фотографиями

Ещё одно приложение, достаточно серьёзно чувствительное к режиму работы встроенного контроллера памяти AMD Phenom — это ACDSee. Причём ему тоже больше по душе Unganged-режим.Заключение

В целом, результат исследования можно считать ничейным — за некоторыми весьма редкими исключениями, не выявлено однозначного преимущества одного из режимов над другим. Не выявлено также и каких-либо чётко прослеживаемых по классам ПО закономерностей и тенденций (в том числе в классах многопоточных и однопоточных приложений, что могло бы хоть как-то согласовываться с официальным позиционированием ganged и unganged режимов). Финальный минус 0,1% у Ganged-режима по большому счёту ни о чём не свидетельствует т.к. глядя на подробные результаты понимаешь, что результат ещё одного какого-нибудь приложения может превратить этот проигрыш в ничью, а может даже и в победу.

Так что наш вывод будет кратким: с точки зрения производительности реального, «рабочего» десктопного ПО, в подавляющем большинстве случаев абсолютно всё равно, в каком режиме работает контроллер памяти на Phenom. Случаются, конечно, исключения, но они очень редкие, и их характер вряд ли можно спрогнозировать (по крайней мере, на основании данных нашего тестирования).

Что же касается звучавшего в начале статьи вопроса о том «всё ли мы правильно делаем» — то разница в 0,1 балл (или 0,1%), пусть даже и в лучшую сторону, вряд ли может служить поводом для перехода на использование unganged-режима для Phenom в основных тестированиях. Тем более учитывая то, что режим по умолчанию, устанавливаемый системными платами — ganged, а разницу даже в 10 раз большую (1%) мы и так почти никогда не принимаем во внимание, списывая на возможные последствия погрешности измерений или округлений.

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ganged и unganged что это

Q^ Я установил ЦП семейства Phenom и модули памяти, согласно руководству для задействования двухканального режима работы памяти, но в момент прохождения процедуры пост, системой отображается режим “unganged mode, 64-bit”. Как мне задействовать 128-бит двухканальный режим работы памяти?

Может быть Вы спросите какие преимущества даёт этот режим? Отвечу: теоретически пропускная способность памяти (а это быстродействие компьютера) увеличивается вдвое, но станет ли Ваш комп вдвое резвей? Исследования и эксперименты, проведенные вскоре после первого появления этого режима (на чипсетах от nVidia для процессоров Athlon) были проведени тесты и эксперименты, которые показали 10-15% рост производительности системы. Нельзя сказать что это ВСЕГО 10-15%, порой процессор, увеличивающий производительность системы на тот же порядок стоит В РАЗЫ больше, чем обыкновенный (который по приемлемой цене) так что организовать GANGED MODE — стоит!

P.S. спроста недодумаешься в меню «интеллектуального разгона зайти»
P.P.S. так что в отличие от сокета АМ2, 939 и 462 (Socket A) на АМ3 и АМ3+ (и FM2, я думаю) недостаточно правильно (парами и по цветам) расположить планки памяти!

#двухканальный режим #ganged #unganged mode #am2 #am3 #ам2 #ам3 #матплата #сокет #феном #АМД,

User Rating: / 98

What AMD says about the ganged vs unganged question

AMD has some excellent documentations that can be download for free. Let’s examine some extract of the “BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors ”. On section 2.8 we can find some considerations on ganged vs unganged mode. If you are interested in checking the doc, I suggest you to especially read these sections:

In short, the documentation indicates that:

In ganged mode, we have a 128 bit wide logical DIMM that map the first 64 bit on physical DDR channel A and the last 64 bit on DDR channel B. So we can state that a single 128 bit operation is effectively split between two memory channel; on the other hand, the DCTs can not operate independently. In other words, the physical address space is interleaved between the two DIMM in 64 bit steps

In unganged mode, each DCT can act independently and has its own 64 bit wide address space. In this mode the processor can be programmed to interleave the single, physical address space on the two normalized address space associated with the two memory channel; however, the finer possible interleaving unit is the cache line size (64 bytes)

AMD officially suggest to enable unganged mode to benefit from increased parallelism

Some CPU models (for example, the 8 and 12 core Magny Cours G34 processors), can only use the unganged mode.

I draw a graph that, hopefully, should help explaining the differences between ganged and unganged modes:

As you can see, in the ganged mode the physical address space is spread between the two memory channel with a 64 bit granularity: this means that two consecutive 64 bit access will read from two different memory channels and, more importantly, that a 128 bit access can utilize both channel.

On the other hand, in the unganged mode a (relatively) large portion of physical address space is bound to a single memory channel. In the graph above this portion is 64 bytes length, but the K10 processors can be programmed to use an even more coarse grained interleaving scheme. However, the normal interleaving unit in unganged mode is 64 byte length (as shown in the graph), as longer unit can cause a tangible performance loss.

From what we see, one should think that neither approach is the ideal one: the usual registers and operands size is 64 bit (8 byte), so it appear that both the ganged and unganged methods will read this 64 bit entity over only a single memory channel, effectively wasting bandwidth. A byte interleaved (or bit interleaved) mode should give as a great performance boost, right? Simply stated: no. The key point to understand here is that processors do not move in and out from memory data chunks of arbitrary length, but use a fixed-sized scheme: they move data from and to main memory only on a cache line base. On Phenom processor the cache line size is 64 byte long, so these processors move data from and to main memory only in 64 bytes chunks. This means that if we try to read a byte at address 0x0, the entire cache line (64 byte) will be fetched by the processor! While this can seems counterproductive, it has its reasons, especially related to space locality and cache design. It is beyond the scope of this article to explain why processors behave in this manner, but in short we can state that this design permit good performance boost (because exploit code and data space locality) and the creation of very dense caches.

As memory operations happens in 64 bytes chunks, it appear that ganged mode will always win: it can spread that 64 bytes operations on the two memory channel, while the unganged mode will only use a single memory channel. The reality, however, is the the unganged mode rarely suffer from this problem, because normally there are many outstanding memory request to be completed, so there are many outstanding cache line to be fetched from or stored to main memory. While the ganged mode will be faster in operating on a single cache line, the unganged mode can theoretically operate on two cache line at a given moment (with some restrictions). This parallelism can be realized because the memory controller incorporate an 8 entry depth memory controller queue (the “MCQ” box in the drawing above), for a total of 8 outstanding cache line requests.

However, simply stating that the unganged mode has the potential to be often on par with the ganged mode is not enough: in this case, we can simply use the ganged mode and forget about the unganged mode. The point is that the unganged mode has potential to be faster that ganged mode. Why? Because we must realize that main memory access don’t happen immediately, as the DRAM chip require many ns to be accessed: after this initial access time the data can be transferred quite quickly, but the initial access steps can be very slow (from a processor standpoint). Starting two memory operations at the same time, the memory controller has the possibility to hide at least partially the latency involved in the setup steps of the second operations. Obviously this is not always true, but it is a possibility indeed and, so, this can be an advantage of unganged vs ganged method. Moreover, using the unganged mode the memory controller can theoretically both write to and read from memory at the same time: this should help memory copy routines and multitasking operating system, where many processes can both read from and write to memory at the same time.

Summarizing the whole point, we can state that:

the ganged mode has the potential to be faster than unganged mode because it use a more fine grained interleave mode

the unganged mode has the potential to be faster than ganged mode because it can start two memory operations at the sime time, effectively hiding at least part of the latency involved in the second operation. Also, this mode permit to both read from and write to memory at the same time, with the intrinsic advantages that this possibility implies.

So, we don’t have a “magic setting” that will always give us the better possible performance. We should run some benchmarks to understand wich applications and scenarios benefits from one method rather than the other.

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Unganged dual что значит

Unganged dual что значит

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Материнка Gigabyte GA-MA770T-UD3P. В данный момент у меня две планки памяти DDR3 1333 Transcend TS128MLK64V3U по гигу, работают в режиме Unganged Dual DDR3-1339, тайминги 9-9-9-24. WinXp32 SP3. Вопрос в следующем: если я докуплю ещё дополнительно 2 гига – в каком виде это лучше сделать?
1) Две таких же планки 1333 Transcend TS128MLK64V3U по гигу – итого 4 одинаковых модуля в 4 слотах;
2) Две планки 1333 по гигу любых других производителей (имеются на выбор Kingston, Silicon Power, Samsung);
3) ОДНУ планку 2 гига;
4) Обменять/продать просто на 2 планки по 2 гига.

И какой смысл во всех этих Unganged Dual / Ganged Dual / Dual Modes в каждом из вышеперечисленных вариантов?

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2 планки по 2 гига одного производителя из одной коробки (это несколько дешевле).

смысл в скорости обмена данными между процессором и памятью, а также работой самой памяти.

——-
Потписи нет. И не будит.

Если же вы забыли свой пароль на форуме, то воспользуйтесь данной ссылкой для восстановления пароля.

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В моём случае ничуть не дешевле. Как обменять мои – проблема. А если продавать – то как б/у. А это как минимум минус 40% от стоимости. Дешевле всего купить 2048M DDR III 1333Mhz Transcend за 1780 рублей, “классически двухканально-правильнее” две 1024M DDR III 1333Mhz Transcend по 980 каждая.

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мнение номер раз: “В процессорах Phenom присутствуют два контроллера памяти, работающие параллельно и такой вещи, как Single/Dual режимы памяти у феномов нет в принципе, каждый поток снабжен отдельным контроллером. Ganged/Unganged режимы подразумевают выбор между типами синхронизации работы обоих контроллеров памяти (грубо говоря, 1*128 бит или 2*64), и выбор одного из них на производительности системы не сказывается. Впрочем, есть специфические задачи, в которых удобнее использовать тот или иной режим DCT. Для стандартного использования это не актуально никак, совсем и вообще.”

так что, по фиг!

The Phenom / PhenomII memory controller: ganged vs unganged mode benchmarked

User Rating: / 100

What AMD says about the ganged vs unganged question

AMD has some excellent documentations that can be download for free. Let’s examine some extract of the “BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors ”. On section 2.8 we can find some considerations on ganged vs unganged mode. If you are interested in checking the doc, I suggest you to especially read these sections:

In short, the documentation indicates that:

In ganged mode, we have a 128 bit wide logical DIMM that map the first 64 bit on physical DDR channel A and the last 64 bit on DDR channel B. So we can state that a single 128 bit operation is effectively split between two memory channel; on the other hand, the DCTs can not operate independently. In other words, the physical address space is interleaved between the two DIMM in 64 bit steps

In unganged mode, each DCT can act independently and has its own 64 bit wide address space. In this mode the processor can be programmed to interleave the single, physical address space on the two normalized address space associated with the two memory channel; however, the finer possible interleaving unit is the cache line size (64 bytes)

AMD officially suggest to enable unganged mode to benefit from increased parallelism

Some CPU models (for example, the 8 and 12 core Magny Cours G34 processors), can only use the unganged mode.

I draw a graph that, hopefully, should help explaining the differences between ganged and unganged modes:

As you can see, in the ganged mode the physical address space is spread between the two memory channel with a 64 bit granularity: this means that two consecutive 64 bit access will read from two different memory channels and, more importantly, that a 128 bit access can utilize both channel.

On the other hand, in the unganged mode a (relatively) large portion of physical address space is bound to a single memory channel. In the graph above this portion is 64 bytes length, but the K10 processors can be programmed to use an even more coarse grained interleaving scheme. However, the normal interleaving unit in unganged mode is 64 byte length (as shown in the graph), as longer unit can cause a tangible performance loss.

From what we see, one should think that neither approach is the ideal one: the usual registers and operands size is 64 bit (8 byte), so it appear that both the ganged and unganged methods will read this 64 bit entity over only a single memory channel, effectively wasting bandwidth. A byte interleaved (or bit interleaved) mode should give as a great performance boost, right? Simply stated: no. The key point to understand here is that processors do not move in and out from memory data chunks of arbitrary length, but use a fixed-sized scheme: they move data from and to main memory only on a cache line base. On Phenom processor the cache line size is 64 byte long, so these processors move data from and to main memory only in 64 bytes chunks. This means that if we try to read a byte at address 0x0, the entire cache line (64 byte) will be fetched by the processor! While this can seems counterproductive, it has its reasons, especially related to space locality and cache design. It is beyond the scope of this article to explain why processors behave in this manner, but in short we can state that this design permit good performance boost (because exploit code and data space locality) and the creation of very dense caches.

As memory operations happens in 64 bytes chunks, it appear that ganged mode will always win: it can spread that 64 bytes operations on the two memory channel, while the unganged mode will only use a single memory channel. The reality, however, is the the unganged mode rarely suffer from this problem, because normally there are many outstanding memory request to be completed, so there are many outstanding cache line to be fetched from or stored to main memory. While the ganged mode will be faster in operating on a single cache line, the unganged mode can theoretically operate on two cache line at a given moment (with some restrictions). This parallelism can be realized because the memory controller incorporate an 8 entry depth memory controller queue (the “MCQ” box in the drawing above), for a total of 8 outstanding cache line requests.

However, simply stating that the unganged mode has the potential to be often on par with the ganged mode is not enough: in this case, we can simply use the ganged mode and forget about the unganged mode. The point is that the unganged mode has potential to be faster that ganged mode. Why? Because we must realize that main memory access don’t happen immediately, as the DRAM chip require many ns to be accessed: after this initial access time the data can be transferred quite quickly, but the initial access steps can be very slow (from a processor standpoint). Starting two memory operations at the same time, the memory controller has the possibility to hide at least partially the latency involved in the setup steps of the second operations. Obviously this is not always true, but it is a possibility indeed and, so, this can be an advantage of unganged vs ganged method. Moreover, using the unganged mode the memory controller can theoretically both write to and read from memory at the same time: this should help memory copy routines and multitasking operating system, where many processes can both read from and write to memory at the same time.

Summarizing the whole point, we can state that:

the ganged mode has the potential to be faster than unganged mode because it use a more fine grained interleave mode

the unganged mode has the potential to be faster than ganged mode because it can start two memory operations at the sime time, effectively hiding at least part of the latency involved in the second operation. Also, this mode permit to both read from and write to memory at the same time, with the intrinsic advantages that this possibility implies.

So, we don’t have a “magic setting” that will always give us the better possible performance. We should run some benchmarks to understand wich applications and scenarios benefits from one method rather than the other.

Thread: Phenom ganged and unganged modes

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Phenom ganged and unganged modes

ganged mode is 1x128bit dual channel

unganged is 2×64 bit dual channel

Some motherboards are reporting unganged as single channel at boot, this is not true, if you see anyone saying they have defective memory please point them to this post.

Ganged will give higher sandra bandw />

If you are running multi threaded benchmarks you need to be in unganged mode, this is the fastest way of running the system.

Got a problem with your OCZ product.
Have a look over here
Tony AKA BigToe

Tuning PC’s for speed. Run whats fast, not what you think is fast

Thanks for info, anyone know whats the difference between 790x and fx? except 2x more pcie slots

thanks for the heads up and info

Good to know this from reliable source!

As of 790X chipset it will work with AMD Overdrive .

RiG1: Ryzen 7 1700 @4.0GHz 1.39V, Asus X370 Prime, G.Skill RipJaws 2x8GB 3200MHz CL14 Samsung B-die, TuL Vega 56 Stock, Samsung SS805 100GB SLC SDD (OS Drive) + 512GB Evo 850 SSD (2nd OS Drive) + 3TB Seagate + 1TB Seagate, BeQuiet PowerZone 1000W

RiG2: HTPC AMD A10-7850K APU, 2x8GB Kingstone HyperX 2400C12, AsRock FM2A88M Extreme4+, 128GB SSD + 640GB Samsung 7200, LG Blu-ray Recorder, Thermaltake BACH, Hiper 4M880 880W PSU

SmartPhone Samsung Galaxy S7 EDGE
XBONE paired with 55” Samsung LED 3D TV

Here is an example regarding Unganged performance and how the amount of test threads affects the bandwidth:

edit: just to clarify: Sandra uses 2 threads in case of K8 Dual Core CPU (the highest reference score in the screenshot)

Im going to push all the motherboard vendors I talk with to reword unganged single channel to dual channel 2x64bit mode on the boot screen, this simple misrepresentation is going to cause no end of RMA requests for all the memory manufacturers.

Got a problem with your OCZ product.
Have a look over here
Tony AKA BigToe

Tuning PC’s for speed. Run whats fast, not what you think is fast

Wooaa You have POWER

but yea thanks for heads up as yea I would of been left scratching my head

Very good initiative ,will save a lot of time and money.

Wow.. very valuable info. Thanks, Sir!
Can we choose between those options in BIOS? Or, is it done automatically?

Got a problem with your OCZ product.
Have a look over here
Tony AKA BigToe

Tuning PC’s for speed. Run whats fast, not what you think is fast

whats the difference between 1 thread and 2 thread sandra test?

and does anyone know why phenom memory bandwidth is so low?

single dual channel 1x128bit for ganged and
dual single channel 2x64bit for unganged mode

AMD’s K10 spec says there is a new channel interleaving option beside chip/bank interleaving.
Can channel interleaving be activated via the bios and does it have an impact on performance?

I think channel interleave is the same as unganged mode.

It’s a BIOS setting, as Tony pointed out. But it should be noted that unganged mode will only be available on AM2+ boards.

Look at “F2x110 DRAM Controller Select Low Register” in AMD’s BIOS and Kernel Developer’s Guide pg. 201.

It are different things and they can be configured independent.

Ok, but I’m quite sure that unganged mode was referred to as channel interleave in some of the old previews.

DctGangEn definitely looks like the basic ganged/unganged option.

Not quite sure how DctSelIntLvEn works, but it seems that it sortof ping-pongs the addresses between the channels. However, I’d guess that could be done under the ordinary unganged mode as well. K10 is said to have better support for mismatched DIMMs, which seems to be at least part of what this feature does:

“If the amount of memory connected to each of the DCTs is different, then channel interleaving may be supported across the address range that includes both DCTs”

They also mention the word “node”, which could mean that this feature applies to multisocket systems. But I’m not sure.

We’ll probably see different solutions, just like with AM2 boards. Either way it shouldn’t be chipset dependant.

On some boards, slot 1 and 2 constitute one channel, a design which favors scalability with four DIMMs rather than two. That’s because the strobe mismatch between each slot within each channel would be smaller. The strobe delays are set on a channel basis, which means that each slot cannot be configured independently (each pair must share the same settings). Trace lengths and routing mismatches affect the strobe delays, and the smaller the distance between the slots that are sharing the same timings, the smaller the actual delay differences between the slots.

When using two sticks in dualchannel, the tables turn. Two sticks would normally scale a little bit higher on a board where slot 1 and 2 connect to different channels. Shorter traces mean reduced capacitive loading and possibly lower delays (like Max Async Latency), so with two slots populated it would normally be best to use the slots that are closest to the CPU..

Thread: Phenom ganged and unganged modes

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Phenom ganged and unganged modes

ganged mode is 1x128bit dual channel

unganged is 2×64 bit dual channel

Some motherboards are reporting unganged as single channel at boot, this is not true, if you see anyone saying they have defective memory please point them to this post.

Ganged will give higher sandra bandw />

If you are running multi threaded benchmarks you need to be in unganged mode, this is the fastest way of running the system.

Got a problem with your OCZ product.
Have a look over here
Tony AKA BigToe

Tuning PC’s for speed. Run whats fast, not what you think is fast

Thanks for info, anyone know whats the difference between 790x and fx? except 2x more pcie slots

thanks for the heads up and info

Good to know this from reliable source!

As of 790X chipset it will work with AMD Overdrive .

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RiG2: HTPC AMD A10-7850K APU, 2x8GB Kingstone HyperX 2400C12, AsRock FM2A88M Extreme4+, 128GB SSD + 640GB Samsung 7200, LG Blu-ray Recorder, Thermaltake BACH, Hiper 4M880 880W PSU

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Here is an example regarding Unganged performance and how the amount of test threads affects the bandwidth:

edit: just to clarify: Sandra uses 2 threads in case of K8 Dual Core CPU (the highest reference score in the screenshot)

Im going to push all the motherboard vendors I talk with to reword unganged single channel to dual channel 2x64bit mode on the boot screen, this simple misrepresentation is going to cause no end of RMA requests for all the memory manufacturers.

Got a problem with your OCZ product.
Have a look over here
Tony AKA BigToe

Tuning PC’s for speed. Run whats fast, not what you think is fast

Wooaa You have POWER

but yea thanks for heads up as yea I would of been left scratching my head

Very good initiative ,will save a lot of time and money.

Wow.. very valuable info. Thanks, Sir!
Can we choose between those options in BIOS? Or, is it done automatically?

Got a problem with your OCZ product.
Have a look over here
Tony AKA BigToe

Tuning PC’s for speed. Run whats fast, not what you think is fast

whats the difference between 1 thread and 2 thread sandra test?

and does anyone know why phenom memory bandwidth is so low?

single dual channel 1x128bit for ganged and
dual single channel 2x64bit for unganged mode

AMD’s K10 spec says there is a new channel interleaving option beside chip/bank interleaving.
Can channel interleaving be activated via the bios and does it have an impact on performance?

I think channel interleave is the same as unganged mode.

It’s a BIOS setting, as Tony pointed out. But it should be noted that unganged mode will only be available on AM2+ boards.

Look at “F2x110 DRAM Controller Select Low Register” in AMD’s BIOS and Kernel Developer’s Guide pg. 201.

It are different things and they can be configured independent.

Ok, but I’m quite sure that unganged mode was referred to as channel interleave in some of the old previews.

DctGangEn definitely looks like the basic ganged/unganged option.

Not quite sure how DctSelIntLvEn works, but it seems that it sortof ping-pongs the addresses between the channels. However, I’d guess that could be done under the ordinary unganged mode as well. K10 is said to have better support for mismatched DIMMs, which seems to be at least part of what this feature does:

“If the amount of memory connected to each of the DCTs is different, then channel interleaving may be supported across the address range that includes both DCTs”

They also mention the word “node”, which could mean that this feature applies to multisocket systems. But I’m not sure.

We’ll probably see different solutions, just like with AM2 boards. Either way it shouldn’t be chipset dependant.

On some boards, slot 1 and 2 constitute one channel, a design which favors scalability with four DIMMs rather than two. That’s because the strobe mismatch between each slot within each channel would be smaller. The strobe delays are set on a channel basis, which means that each slot cannot be configured independently (each pair must share the same settings). Trace lengths and routing mismatches affect the strobe delays, and the smaller the distance between the slots that are sharing the same timings, the smaller the actual delay differences between the slots.

When using two sticks in dualchannel, the tables turn. Two sticks would normally scale a little bit higher on a board where slot 1 and 2 connect to different channels. Shorter traces mean reduced capacitive loading and possibly lower delays (like Max Async Latency), so with two slots populated it would normally be best to use the slots that are closest to the CPU..

Unganged dual что значит

Hey all.
I’ve just built a new Spider system. So, I’ve benched the CRAP out of these sticks using Everest Ultimate Memory Benchmark (I know, quick and dirty, but it is quick and gives a decent impression of where my next step in overclocking should be)

Why is it that Ganged *ALWAYS* gives more bandwidth than UNganged with my board and these sticks running the Everest Benchmarks??

The difference is actually quite a bit – about 1000MB/s on READ and roughly 500MB/z on WRITE and COPY, with the latency (ns) being significantly slower using UNganged (i.e. 53.3ns Ganged vs. 57.1ns UNganged)

So, I understand what Ganging actually is – I’ve read it on at least 6 different forums. but what I don’t understand is the numbers that I’m seeing. is Everest just plain wrong? or is there something that I’m missing??

So far, I’ve tested lots of different combinations of overclock, from low FSB and high CPU multi, to 800MHz RAM with tight latencies to 1067MHz RAM with SPD latencies, to voltage increases and decreases.
I’ve found that these sticks will boot to Windows at 1175MHz with the NB and HT at

2400MHz (2150MHz for the HT)

But, I’m having some issues combining it all. I understand the old K8 well.
I had an Opty 165 running at 3.2GHz for over a year on an A8R32-MVP Deluxe with 2 X 1GB XMS3202 v1.3 running at a whopping 583MHz (292MHz), and I also understand the equation for a perfect overclock:

(CPU Multi) * (FSB) = (CPU Freq)
(CPU Multi) / (Memory Div > (CPU Freq) / (Divisor Ratio) = RAM MHz (* 2 = DDR)
(NB (or HT back in the old days)) * (FSB) = NB MHz
and that the new unlocked HT *has* to always be less than the NB.

So, currently, I’ve been able to boot to Windows at 2.9GHz (unstable) at 1.3V, 2.8GHz (stable as per Orthos and OCCT for 6 hours so far) with the NB at 2206 and the HT at 2006, RAM at 535MHz 5-7-7-25-31 2T at 2.2V.

In addition to the question on Ganged vs. UNganged, can someone maybe help me get a bit more out of my system?? Again, veteran overclocker and I understand a lot about overclocking. but there’s something I’m just not getting here.

The Phenom has two memory controllers on the CPU. Ganged is setting both memory controllers to work together which allows data (that is being used by all cores) to await on the queue until they are accessed. Unganging means that the two controllers work independently. This allows them to work asynchronously with reference to individual clocks with their one or two Dimms. I would set your Quad Core to unganged.

If you want more performance, then run with a two DRAM slot population. Test it out. Remove two sticks and retest. Also, keep in mind that fast and unstable means little and looking at the speed of an unstable system is not a good way to find your sweet spot. I can run my DRAM faster and my system faster by a fair bit, but it will be unstable. It is foolish for me to not accept the limitations that stability sets on my system speed.

I can make 4.0Ghz unstable and 11000MB/s Read with 47ms latencies. Nice but nowhere near stable.

I can make 3.6Ghz stable and 9958MB/s Read with 50.3ms latencies. That’s my reality. If I install two more of the Corsair 10000 (1250Mhz) sticks, I lose my 1200Mhz DRAM speed and it has to drop to

1066Mhz to deal with the memory controller.

Now the AMD Phenom is known to be wonky and higher DRAM speeds. Running with four slots populated is also known to create instability in Phenom when attempting high speeds.

You may wish to research here:

Thanks for the reply.

I do understand what Ganged vs. UNganged actually is, I’ve researched the CRAP out of it because I didn’t know and had never seen it before this board. but thanks for the info anyway.

I also understand the different between an unstable overclock with killer looking numbers and the reality of the hardware’s limits – been doing this for many years, and I absolutely agree with you.

On the part about only populating 2 banks instead of all 4, I’ve just ordered 2 X 2GB modules of the Dominator 8500C5DF that hopefully will come in as the version 1 – *that* would be nice. – but I will give the 2 bank overclock a try.

Thanks for the link – been there, as well as all over the ‘net researching. but in the end, I haven’t really learned much from other people’s experiences since all hardware is not created equal. I know that the same exact stepping Phenom 9850 in the same exact M3A32-MVP revision board that I have will overclock quite differently – some reaching into the 3.2GHz + range on air. stable. But, I also know that doesn’t mean mine is going to.

Thanks for the help though – the 2 X 2GB sticks hopefully will help me out a bit.

**BUT – I still can’t get it straight in my head why Everest’s Memory Benchmark shows higher throughput for Ganged with my setup. shouldn’t it be the other way around? Seems like if the memory controllers are independent, that they BOTH could access information at the same time rather than having to wait on a queue, right.
I have run the bench so many times that I’m sick of doing it. and *every* time, it shows UNganged with a lower throughput than Ganged – is this just an Everest error?

Thanks for clarifying your question. Sometimes the tree is hard to see for the forest. I agree with you. Unganged not only should be faster, in my mind, it is faster. Ganged mode is 1x128bit dual channel and unganged mode is 2×64 bit dual channel. Most programs that test for bandwidth are not testing Phenom correctly. They are testing with a one threaded algorithmic mode. I’m not sure if there is any program that, at this time tests with a two threaded algorithmic mode. What is confusing for most is that Eversest, Sandra, et al, test with a two threaded algorithmic mode for K8 Dual Core. This serves to really piss off those who have moved from K8 to Phenom and think that their data stream is slower. Also, keep in mind that the Phenom works with just one 64 bit IMC, not two which will be a true unganged mode when the CPU runs with two 64 bit IMC’s.

Regarding the two modules of DRAM. When populating with two DRAM modules in Dual Channel, two sticks will scale higher on a board where slot 1 and 2 connect to different channels. Shorter traces mean reduced capacitive loading and possibly lower delays (like Max Async Latency), so with two slots populated it would normally be best to use the slots that are closest to the CPU. However, I believe that your M3N32 has an adjustable “AI Skew” in the BIOS which will serve to compensate for trace lengths.

There’s a bit more information here where the same results as you have interpreted has been found.

Derek, you’re awesome! Thanks for the input.
I understand now that the benchmarks out there aren’t really testing both channels as individuals. maybe Everest will have an update for it soon.

And, you’re right, the M3A32-MVP BIOS does indeed have adjustable skews. but what’s really cool, to my knowledge, any configuration of RAM in any given bank will result in Dual mode. (i.e. bank1 and bank2 or bank1 and bank3 or whatever. ) instead of the old way of splitting up the ram into channels (which this BIOS has also)

So, anyway, I’ve read and read, and tested this RAM ad nauseum (so much so, that I’ve actually superglued a toothpick to the CMOS jumper to make it quick and easy to clear. 😉 ) – and I’ve found that 5-7-5-23 2T at 2.2V seems to work pretty effectively, but I’d really like to dial in this RAM (well, the new 2X 2GB 8500C5Df when it gets here)
A couple things I used to do to attain stability on my ‘old’ Opty 165 system with the XMS3202C2 RAM was to raise (beyond SPD) the Read Preamble, TREF and ASYNC Latency. then crank up the MHz till it wouldn’t POST, drop it down a bit, then tighten everything else up, leaving the Read Preamble, TREF and ASYNC Latency up high (mostly still above SPD – i.e. Read Preamble 9.0ns, TREF at 15.6us, and ASYNC Latency at 10.0ns (maybe I have the ASYC and Read Preamble backwards- I can’t remember)
Anyway, what I’m getting at here is that this BIOS doesn’t have *any* of those latencies (with the exception of TREF, and it has 4 of them – assumable because of 4 sticks (?) and their values are in the hundreds instead of the tens)

So, what does Read Preamble, TREF and ASYNC Latency translate to with the newer DDR2 sticks??

Thank you again for all the information and help. I really appreciate it!

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